AMD Xilinx Vivado Design Suite (ML Enterprise Edition)
Vivado is the design software for AMD adaptive SoCs and FPGAs. It includes: Design Entry, Synthesis, Place and Route, Verification/Simulation tools. Vivado supports design entry in traditional HDL like VHDL and Verilog. The Vivado ML Edition offers two key technologies that significantly reduce design iteration times: Incremental compile and Abstract Shell. This catalog item provides the Vivado ML Enterprise Edition which support for all AMD devices. It also supports a graphical user interface-based tool called the IP Integrator (IPI) that allows for a Plug-and-Play IP Integration Design Environment.
Verification and HW Debug is critical to ensure the functionality, performance, and reliability of the final FPGA implementation. Vivado’s verification features enable efficient validation of design functionality while its comprehensive debugging features empower engineers to efficiently locate and resolve issues within complex FPGA designs.
Dynamic Function eXchange (DFX) allows designers to dynamically modify sections of the FPGA designs on-the-fly. Designers can download partial bitstreams to the FPGA while the remaining logic continues to operate. Dynamic Function eXchange can allow designers to move to fewer or smaller devices, reduce power, and upgrade systems in real-time.
Tools that are installed as part of this product include:
- Vivado Design Edition 2014.4
- Vivado HL Design Edition 2018.3
- Vivado ML Enterprise Edition 2021.1
- Vivado ML Enterprise Edition 2021.2
Please contact AMD for information on plans and pricing
AMD Adaptive SoC & FPGA Support is committed to keeping design teams highly productive with a range of support offerings and processes designed to keep users focused on reducing time to market and achieving silicon success. Key features available within Adaptive SoC & FPGA Support include:
- Community Forums: Ask questions, get answers and participate in discussions
- Knowledge Base: Acces Design Advisories, Solution Centers and Known Issues
- Support Blogs: Engineers share lessons learned in designing and debugging Adaptive SoCs & FPGAs
- Search Documentation: Browse Documentation, Documentations Protal, Doc Nav and Design Guidance